求才職稱 | 資格條件 | 工作內容 | 待遇 | 工作地點 | 需求人數 |
類比IC設計工程師 / Analog Circuit Design Engineer
(理工科系職缺:是)
|
1. 電子電機工程相關科系,碩士以上學歷 2. 具bandgap, regulator, SA 等analog circuits design, charge pump design及 memory design 經驗者為佳 3. 熟悉Hspice, HSIM, AFS, XA Virtuoso, Composer及 Layout工具為佳 4. 具良好溝通協調技巧,團隊精神及創新思維 5. 對於非揮發性記憶體領域元件特性,製程或測試相關知識熟稔,有意換跑道者,對電路設計工作抱持熱忱的你,也是我們尋覓的對象 6. 與多家國際知名大廠協同開發最先進的IC產品,可以瞭解產業最新的技術脈動,歡迎喜愛接受挑戰的你,一起來開創未來 Education, Experience & Qualifications: 1.Master degree or above in Electrical Engineering or related majors 2.Familiar with memory test chip/IP/product level design 3.Track-record of successful circuit design in bandgap, regulator, SA or charge pump areas 4.Good at CAD TOOLs like Hspice, AFS, XA, Virtuoso, Composer and Layout tools 5.In-depth knowledge of full-custom NVM IP design, embedded NVM technology criteria and limit is preferred6.Good communication skills, team work and innovative mindset
|
1. 類比電路開發設計與佈局優化(Bandgap, LDO, Charge Pump等類比電路) 2. 非揮發性記憶體電路開發設計(Array, Decoding, Sense Amplifier等電路) 3. 消費性、物聯網與車用電子之非揮發性記憶體電路整合開發設計 Our Design Team is responsible for NVM (Non-Volatile Memory) IC circuit design. As an Analog Circuit Design Engineer, your responsibilities
include: 1. Design, verify and debug analog circuits ( Bandgap, LDO, Charge Pump… ) 2. Memory peripheral circuits t for NVM IP & test chip ( Array, Decoding, Sense Amplifier,…) 3. Work on IP specification, IP/test chip design, layout optimization and corner simulation of NVM IP
|
面議
|
新竹縣
新竹縣竹北市台元一街5號8樓
| 5 |
元件工程師 / Device Engineer
(理工科系職缺:是)
|
1.電子電機工程相關科系,碩士以上學歷,論文為相關半導體元件設計領域尤佳 2.精通半導體元件物理、非揮發性記憶體、半導體製程、先進半導體製程 (high-K metal gate devices, ultra-thin dielectric layer…) 等相關知識 3.熟悉電子學、電路學、半導體可靠度分析相關知識 4.具良好溝通協調技巧,團隊精神及創新思維 Education, Experience & Qualifications: 1.Electrical Engineering background 2.Master Degree or above 3.3+ years experience in Analog Circuit Design 4.Experience in Memory Sensing, Bandgap, LDO or Charge Pumping is preferred 5.Experience in High Speed & Low Power Circuit Design is preferred
|
1.非揮發性記憶體相關元件研究開發 2.客戶產品技術服務 3.晶圓廠技術服務窗口 Our Team is responsible for NVM (Non-Volatile Memory) IC. As a Device Engineer, your are responsible for Nonvolatile Memory technology development, verification and qualification.
|
面議
|
新竹縣
新竹縣竹北市台元一街5號8樓
| 1 |
產品驗證工程師 Product Validation Engineer
(理工科系職缺:是)
|
1. 電子、電機、光電及其他工程相關背景 2. 具有程式語言撰寫能力,熟悉C, C++ , Perl程式語言 或 Excel VBA程式設計者尤佳 3. 熟悉半導體元件、製程技術或數位邏輯電路佳 4. 具測試機的程式撰寫經驗尤佳 5. 具良好團隊精神、溝通技巧與協調合作能力 6. 具FAE工作經驗尤佳 Education, Experience & Qualifications: 1. Master degree or above in Electrical Engineering or related majors 2. Programming skill with C, C++, Perl or Excel VBA is a plus 3. Familiarity with semiconductor device, process or CMOS digital circuit is a gre at advantage 4. Experiences in ATE test program maintenance or development is a great advantage 5. Good teamwork, communication and collaboration skills 6. Experiences in FAE is a great advantage
|
1. 嵌入式非揮發性記憶體產品功能測試、特性分析與可靠度驗證 2. 嵌入式非揮發性記憶體產品故障分析與良率提升 3. 嵌入式非揮發性記憶體產品測試程式開發 As a Product Test Engineer, you will manage the product test development to cooperate with design and process engineers for Embedded NVM (Non-Volatile Memory) product verification. In this role, your responsibilities include: 1. Embedded NVM functional testing, performance characterization and reliability testing 2. Embedded NVM failure analysis and yield improvement 3. Embedded NVM test program development
|
面議
|
新竹縣
新竹縣竹北市台元一街5號8樓
| 2 |
軟體工程師 SW Engineer
(理工科系職缺:是)
|
1.Strong understanding of cryptographic algorithms and protocols. 2.Experience with secure coding practices and security assessment tools. 3.Proficiency in programming languages such as C, C++, Rust, and Python. 4.Excellent problem-solving and analytical skills. 5.Strong communication skills, both written and verbal. 6.Ability to work effectively in a team environment.
|
1.Develop secure software solutions for HSMs, including cryptographic algorithms, key management protocols, and secure communication interfaces. 2.Work closely with hardware engineers to ensure seamless integration of software and hardware components. 3.Conduct regular security assessments and code reviews to identify and mitigate vulnerabilities. 4.Perform rigorous testing and debugging of HSM software to ensure reliability and security. 5.Maintain comprehensive technical documentation for all software components and development processes. 6.Collaborate with cross-functional teams, including hardware engineers, security analysts, and product managers, to deliver high-quality security solutions. 7.Ensure all software solutions comply with relevant security standards and regulations (e.g., FIPS 140-3, Common Criteria).
|
面議
|
新竹縣
新竹縣竹北市台元一街5號8樓
| 1 |
資深軟體工程師 Senior SW Engineer
(理工科系職缺:是)
|
1.Strong understanding of cryptographic algorithms and protocols. 2.Experience with secure coding practices and security assessment tools. 3.Proficiency in programming languages such as C, C++, Rust, and Python. 4.Excellent problem-solving and analytical skills. 5.Strong communication skills, both written and verbal. 6.Ability to work effectively in a team environment.
|
1.Develop secure software solutions for HSMs, including cryptographic algorithms, key management protocols, and secure communication interfaces. 2.Work closely with hardware engineers to ensure seamless integration of software and hardware components. 3.Conduct regular security assessments and code reviews to identify and mitigate vulnerabilities. 4.Perform rigorous testing and debugging of HSM software to ensure reliability and security. 5.Maintain comprehensive technical documentation for all software components and development processes. 6.Collaborate with cross-functional teams, including hardware engineers, security analysts, and product managers, to deliver high-quality security solutions. 7.Ensure all software solutions comply with relevant security standards and regulations (e.g., FIPS 140-3, Common Criteria).
|
面議
|
新竹縣
新竹縣竹北市台元一街5號8樓
| 1 |
類比電路設計工程師 Analog Hardware IP Design Engineer
(理工科系職缺:是)
|
1. 具備類比電路設計基礎,熟悉環境與工具操作 2. 熟悉Virtuoso、Hspice、Visio等類比設計模擬工具 (MUST) 3. 具備FPGA相關經驗或python code撰寫能力尤佳 4. 具備紮實的數理及工程知識訓練 5. 邏輯表達清楚且具獨立思考、作業、解決問題的能力 6. 主動積極,具團隊合作態度且負責任的人格特質 7. 具IP開發流程或抗攻擊電路設計經驗尤佳 8. 具備日語能力尤佳
|
1. 研發抗攻擊電路以及設計測試晶片 2. 整合FPGA與測試晶片做抗攻擊功能驗證 3. 協助公司產品整合與應用 4. 協助解決客戶工程以及售後問題
|
面議
|
新竹縣
新竹縣竹北市台元一街5號8樓
| 1 |